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Your search returned 7 records. Click on the hyperlinks to view further details of Titles.. |
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Magazine Name : Ieee Journal Of Solid-State Circuits
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Year : 2001 Volume number : 36 Issue: 05 |
A Bitline Leakge Compensation Scheme For Low-Voltage Srams
(Article)
Subject:
Bitline Leakage Currents
,
Cmos Analog Integrated Circuits
,
Compensation Scheme
Author:
Ken
Agawa
H.
Hara
Toshinari
Takayanagi
page:
726
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734
A 25-V 2.0-Gbyte/S 288-Mb Packet-Based Dram With Enhanced Cell Efficiency And Noise Immunity
(Article)
Subject:
Bitline Equalizing Scheme
,
Channel Skew
,
Chip Architecture
Author:
Kye-Hyun
Kyung
Hi-Choon
Lee
Byoung-Sul
Kim
page:
735
-
743
A Dual-Page Programming Scheme For High-Speed Multigigabit-Scale Nand Flash Flash Memories
(Article)
Subject:
Dual-Page Programming
,
Flash Memory
,
Nand Flash Memory
Author:
Ken
Takeuchi
T
Tanaka
page:
744
-
751
1.6 Gb/S/Pin 4-Pam Signaling And Circuits For A Multidrop Bus
(Article)
Subject:
Integrating Receivers
,
Multilevel Systems
,
Parallel Links
,
Pulse Amplititude Modulation
Author:
Jared L
Zerbe
Pak S.
Chau
Bruno W.
Garlepp
page:
752
-
760
A 10-Gb/S Cmos Clock And Data Recovery Circuit With A Half-Rate Linear Phase Detector
(Article)
Subject:
Clock Recovery
,
Half-Rate Cdr
,
Phase Detectors
Author:
Jafar
Savoj
Behzad
Razavi
page:
761
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768
A Si Bicmos Transimpedance Amplifier For 10-Gb/S Sonet Receiver
(Article)
Subject:
Bicmos
,
Constant-K Filter
,
Tia
Author:
Helen H.
Kim
Charles A.
Burrus
Jon
Bauman
page:
769
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776
A 1. 8-Ghz Self-Calibrated Phase-Locked Loop With Precise I/Q Matching
(Article)
Subject:
Delay Mismatch
,
Fractional-N Frequency Synthesis
,
Pll
Author:
Chan-Hong
Park
Ook
Kim
Beomsup
Kim
page:
777
-
783
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